A comprehensive analysis of different 7T SRAM topologies to design a 1R1 W bit interleaving enabled and half select free cell for 32 nm technology node
Crossref DOI link: https://doi.org/10.1098/rspa.2021.0745
Published Online: 2022-03-16
Published Print: 2022-03
Update policy: https://doi.org/10.1098/crossmark-policy
Rawat, Bhawna
Mittal, Poornima https://orcid.org/0000-0002-9479-8628
Text and Data Mining valid from 2022-03-01
Publication History
Received: 2021-09-22
Accepted: 2022-02-07
Published: 2022-03-16
