Area-Efficient 60 GHz +18.9 dBm Power Amplifier with On-Chip Four-Way Parallel Power Combiner in 65-nm CMOS
Crossref DOI link: https://doi.org/10.1007/s10762-017-0368-z
Published Online: 2017-02-23
Published Print: 2017-06
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Farahabadi, Payam Masoumi
Basaligheh, Ali
Saffari, Parvaneh
Moez, Kambiz
License valid from 2017-02-23