Design of High Speed and Low Offset Dynamic Latch Comparator in 0.18 µm CMOS Process
Crossref DOI link: https://doi.org/10.1371/journal.pone.0108634
Published Online: 2014-10-09
Update policy: https://doi.org/10.1371/journal.pone.corrections_policy
Rahman, Labonnah Farzana
Reaz, Mamun Bin Ibne
Yin, Chia Chieu
Ali, Mohammad Alauddin Mohammad
Marufuzzaman, Mohammad
License valid from 2014-10-09