Design of a High Speed and Area Efficient Novel Adder for AES Applications
Crossref DOI link: https://doi.org/10.35940/ijrte.B1057.078219
Published Online: 2019-07-30
Update policy: https://doi.org/10.35940/beiesp.crossmarkpolicy
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Radha, A.
Murthy, K.S.N.
