FPGA Implementation of Encryption and Decryption of a Message using Optimized Reconfigurable Reversible Gate
Crossref DOI link: https://doi.org/10.35940/ijrte.B2396.078219
Published Online: 2019-07-30
Update policy: https://doi.org/10.35940/beiesp.crossmarkpolicy
,
Rajesh, K.
Reddy, Prof. G. Umamaheswara
