Funding for this research was provided by:
IC Design Education Center
National Research Foundation of Korea (2017R1A2A2A05069708)
Article Title: Device design guideline for junctionless gate-all-around nanowire negative-capacitance FET with HfO 2 -based ferroelectric gate stack
Journal Title: Semiconductor Science and Technology
Article Type: paper
Copyright Information: © 2019 IOP Publishing Ltd. All rights, including for text and data mining, AI training, and similar technologies, are reserved.
Publication dates
Date Received: 2019-09-02
Date Accepted: 2019-11-13
Online publication date: 2019-11-29