Single-Port SRAM Cell with lower leakage current in standby mode
Crossref DOI link: https://doi.org/10.56781/ijsret.2023.2.2.0035
Published Online: 2023-05-30
Update policy: https://doi.org/10.56781/srr.ourcrossmarkpolicy
Ming-Hsueh Wu,
Chien-Cheng Yu,
Ming-Chuen Shiau,