Design and FPGA Implementation of GELU Activation Function Using Verilog HDL
Crossref DOI link: https://doi.org/10.59256/ijsreat.20260604001
Published Online: 2026-07-13
Update policy: https://doi.org/10.59256/ijsreat/crossmark-policy-page
Dr, Nuthan AC
Shruthi, V
Monish Gowda, D S
