The Design and Optimization of DDR3 Controller Based on FPGA
Crossref DOI link: https://doi.org/10.1007/978-981-10-6571-2_211
Published Online: 2018-06-07
Published Print: 2019
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Wang, Xuedong
Shen, Lingyu
Jia, Min
License valid from 2018-06-07