Power Analysis and Implementation of Low-Power Design for Test Architecture for UltraSPARC Chip Multiprocessor
Crossref DOI link: https://doi.org/10.1007/978-981-10-6875-1_58
Published Online: 2017-12-22
Published Print: 2018
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Solomon, John Bedford
Moni, D Jackuline
Amar Babu, Y.
License valid from 2017-12-22