Low-Power Adiabatic Logic––Design and Implementation in 32-Nanometer Multigate Technology
Crossref DOI link: https://doi.org/10.1007/978-981-10-7329-8_34
Published Online: 2018-01-26
Published Print: 2018
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Pittala, Suresh Kumar
Rani, A. Jhansi
License valid from 2018-01-01
Text and Data Mining valid from 2018-01-01
Chapter History
First Online: 26 January 2018