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A Write-Improved Half-Select-Free Low-Power 11T Subthreshold SRAM with Double Adjacent Error Correction for FPGA-LUT Design

Crossref DOI link: https://doi.org/10.1007/978-981-13-5950-7_46

Published Online: 2019-01-25

Published Print: 2019

Update policy: https://doi.org/10.1007/springer_crossmark_policy

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