New Symmetric 9-Level Inverter Topology with Reduced Switch Count and Switching Pulse Generation Using Digital Logic Circuit
Crossref DOI link: https://doi.org/10.1007/978-981-15-8586-9_23
Published Online: 2020-12-04
Published Print: 2021
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Thiyagarajan, V.
Text and Data Mining valid from 2020-12-04
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Chapter History
First Online: 4 December 2020