An Area and Delay-Efficient Approximate Hybrid Adder for VLSI Circuit Designs
Crossref DOI link: https://doi.org/10.1007/978-981-19-2828-4_3
Published Online: 2022-09-18
Published Print: 2022
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Kalivaraprasad, B.
Prasad, M. V. D.
Raju Kumar Singh, Ch.
Ravichand, S.
Pramod Kumar, A.
Text and Data Mining valid from 2022-01-01
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Chapter History
First Online: 18 September 2022