A Hardware Minimized Gated Clock Multiple Output Low Power Linear Feedback Shift Register
Crossref DOI link: https://doi.org/10.1007/978-981-32-9775-3_33
Published Online: 2019-12-04
Published Print: 2020
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Mehta, Digvijay Singh
Mishra, Varun
Verma, Yogesh Kumar
Gupta, Santosh Kumar
Text and Data Mining valid from 2019-12-04
Chapter History
First Online: 4 December 2019