500 MHz 90 nm CMOS 2 $$\times $$ × VDD Digital Output Buffer Immunity to Process and Voltage Variations
Crossref DOI link: https://doi.org/10.1007/s00034-018-0895-4
Published Online: 2018-07-09
Published Print: 2019-02
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Wang, Chua-Chin http://orcid.org/0000-0002-2426-2879
Tsai, Tsung-Yi
Deng, Yu-Lin
Lee, Tzung-Je
Text and Data Mining valid from 2018-07-09
Article History
Received: 12 February 2018
Revised: 4 July 2018
Accepted: 5 July 2018
First Online: 9 July 2018