Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators
Crossref DOI link: https://doi.org/10.1007/s00034-018-0905-6
Published Online: 2018-07-27
Published Print: 2019-03
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Bonny, Talal
Al Debsi, Ridhwan
Majzoub, Sohaib
Elwakil, Ahmed S. https://orcid.org/0000-0002-3972-5434
Text and Data Mining valid from 2018-07-27
Article History
Received: 27 January 2018
Revised: 16 July 2018
Accepted: 19 July 2018
First Online: 27 July 2018