Error-Aware Design Procedure to Implement Hardware-Efficient Antilogarithmic Converters
Crossref DOI link: https://doi.org/10.1007/s00034-019-01062-9
Published Online: 2019-02-18
Published Print: 2019-09
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Loukrakpam, Merin http://orcid.org/0000-0001-7325-5424
Choudhury, Madhuchhanda
Text and Data Mining valid from 2019-02-18
Article History
Received: 20 July 2018
Revised: 8 February 2019
Accepted: 9 February 2019
First Online: 18 February 2019