Funding for this research was provided by:
Visvesvaraya PhD Scheme for Electronics & IT, MeitY, Govt. of India (PhDMLA/4(29)/2015-16/01)
Special Manpower Development Programme for Chips-to-System Design, MeitY, Govt. of India (9(1)/2014-MDD (Vol III))
Article History
Received: 8 March 2019
Revised: 6 August 2019
Accepted: 6 August 2019
First Online: 13 August 2019