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CNFET-Based Ultra-Low-Power Dual-$$V_{DD}$$ Ternary Half Adder

Crossref DOI link: https://doi.org/10.1007/s00034-021-01664-2

Published Online: 2021-02-16

Published Print: 2021-08

Update policy: https://doi.org/10.1007/springer_crossmark_policy

Authors

Vidhyadharan, Abhay S.

Bha, Kasthuri

Vidhyadharan, Sanjay https://orcid.org/0000-0002-1855-666X
License Information

Text and Data Mining valid from 2021-02-16

Version of Record valid from 2021-02-16
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Article History

Received: 9 May 2020

Revised: 24 January 2021

Accepted: 29 January 2021

First Online: 16 February 2021