Design and Circuit Implementation of Area-Delay-Product-Efficient Logarithmic Converters Using Mantissa-Bit Compensation Scheme
Crossref DOI link: https://doi.org/10.1007/s00034-022-02073-9
Published Online: 2022-06-23
Published Print: 2022-11
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Kuo, Chao-Tsung
Text and Data Mining valid from 2022-06-23
Version of Record valid from 2022-06-23
Article History
Received: 21 July 2021
Revised: 23 May 2022
Accepted: 25 May 2022
First Online: 23 June 2022