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Design of Ternary Logic Circuits Using GNRFET and RRAM

Crossref DOI link: https://doi.org/10.1007/s00034-023-02445-9

Published Online: 2023-07-12

Published Print: 2023-12

Update policy: https://doi.org/10.1007/springer_crossmark_policy

Authors

Basha, Shaik Javid https://orcid.org/0000-0003-1031-599X
Venkatramana, P. https://orcid.org/0000-0001-5732-6085
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Text and Data Mining valid from 2023-07-12

Version of Record valid from 2023-07-12
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Article History

Received: 3 November 2022

Revised: 27 June 2023

Accepted: 28 June 2023

First Online: 12 July 2023

Declarations

:

: No competing interests.