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High Performance MAC Unit Design with Grouping and Decomposition Multiplier and 18 T Gate Diffusion Input-Transmission Gate Adder

Published Online: 2024-12-13

Published Print: 2025-04

Authors

Umadevi, S. https://orcid.org/0000-0001-7742-9209
Penumaka, Punith

Ram, C. Koushik

Devi, T. Kalavathi https://orcid.org/0000-0003-3356-6601
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Text and Data Mining valid from 2024-12-13

Version of Record valid from 2024-12-13
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Article History

Received: 15 April 2024

Revised: 4 December 2024

Accepted: 4 December 2024

First Online: 13 December 2024

Declarations

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: The authors confirm that they have no conflict of interests, either financial or nonfinancial.

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