Multi-gate device and summing-circuit co-design robustness studies @ 32-nm technology node
Crossref DOI link: https://doi.org/10.1007/s00542-016-3055-4
Published Online: 2016-07-06
Published Print: 2017-09
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Kumar, Amresh
Islam, Aminul
License valid from 2016-07-06