Low power and high speed design issues of CMOS Hamming code generation and error detection circuit at 22 nm and 16 nm channel length of MOS transistor
Crossref DOI link: https://doi.org/10.1007/s00542-018-4143-4
Published Online: 2018-09-22
Published Print: 2021-02
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Bari, Surajit https://orcid.org/0000-0003-3531-4950
De, Debashis
Sarkar, Angsuman
Text and Data Mining valid from 2018-09-22
Version of Record valid from 2018-09-22
Article History
Received: 15 March 2018
Accepted: 15 September 2018
First Online: 22 September 2018