Clock generator IP design in 180 nm CMOS technology
Crossref DOI link: https://doi.org/10.1007/s10470-016-0737-x
Published Online: 2016-04-11
Published Print: 2016-06
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Meng, Xu
Lin, Fujiang
Text and Data Mining valid from 2016-04-11
