A compact low-power algorithmic A/D converter implemented on a large scale FPAA chip
Crossref DOI link: https://doi.org/10.1007/s10470-017-1084-2
Published Online: 2017-11-23
Published Print: 2018-01
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Wang, Tzu-Yun https://orcid.org/0000-0003-3548-1652
Peng, Sheng-Yu
Hasler, Jennifer
License valid from 2017-11-23
