Effect of jitter on the settling time of mesochronous clock retiming circuits
Crossref DOI link: https://doi.org/10.1007/s10470-018-1344-9
Published Online: 2018-10-15
Published Print: 2019-12
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Kadayinti, Naveen http://orcid.org/0000-0003-0859-9380
Budkuley, Amitalok J.
Baghini, Maryam S.
Sharma, Dinesh K.
Text and Data Mining valid from 2018-10-15
Article History
Received: 12 September 2017
Revised: 3 September 2018
Accepted: 28 September 2018
First Online: 15 October 2018