Low-power high-speed CMOS double tail dynamic comparator using self-biased amplification stage and novel latch stage
Crossref DOI link: https://doi.org/10.1007/s10470-019-01518-7
Published Online: 2019-08-10
Published Print: 2019-11
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Dubey, Avaneesh K. http://orcid.org/0000-0001-8499-3713
Nagaria, R. K.
Text and Data Mining valid from 2019-08-10
Version of Record valid from 2019-08-10
Article History
Received: 13 December 2018
Revised: 24 July 2019
Accepted: 27 July 2019
First Online: 10 August 2019