Design procedure for noise and power optimisation of CMOS folded-cascode operational transconductance amplifier based on the inversion coefficient
Crossref DOI link: https://doi.org/10.1007/s10470-022-02023-0
Published Online: 2022-03-21
Published Print: 2022-05
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Thanachayanont, Apinunt https://orcid.org/0000-0001-9466-9570
Text and Data Mining valid from 2022-03-21
Version of Record valid from 2022-03-21
Article History
Received: 16 July 2021
Revised: 16 January 2022
Accepted: 28 February 2022
First Online: 21 March 2022