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VLSI implementation of multiplier design using reversible logic gate

Crossref DOI link: https://doi.org/10.1007/s10470-023-02150-2

Published Online: 2023-02-20

Published Print: 2023-04

Update policy: https://doi.org/10.1007/springer_crossmark_policy

Authors

Nandhini, V.

Sambath, K.
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Text and Data Mining valid from 2023-02-20

Version of Record valid from 2023-02-20
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Article History

Received: 21 January 2022

Revised: 13 August 2022

Accepted: 6 February 2023

First Online: 20 February 2023