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On the design of a level-crossing ADC with 1-bit DAC and rail-to-rail continuous-time comparator

Crossref DOI link: https://doi.org/10.1007/s10470-025-02344-w

Published Online: 2025-02-08

Published Print: 2025-03

Update policy: https://doi.org/10.1007/springer_crossmark_policy

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