Exploring analog VLSI architectures for linear regulators and high-speed receivers: a comprehensive SLR and emerging innovations
Crossref DOI link: https://doi.org/10.1007/s10470-025-02486-x
Published Online: 2025-09-15
Published Print: 2025-10
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Nagula, Suresh
Patri, Sreehari Rao
Goel, Ekta
Text and Data Mining valid from 2025-09-15
Version of Record valid from 2025-09-15
Article History
Received: 17 March 2025
Revised: 13 August 2025
Accepted: 17 August 2025
First Online: 15 September 2025
Declarations
:
: The authors declare no competing interests.