Performance constrained multi-application network on chip core mapping
Crossref DOI link: https://doi.org/10.1007/s10772-019-09636-3
Published Online: 2019-09-19
Published Print: 2019-12
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Reddy, B. Naresh Kumar
Kishan, Dharavath
Vani, B. Veena
Text and Data Mining valid from 2019-09-19
Version of Record valid from 2019-09-19
Article History
Received: 8 October 2017
Accepted: 11 September 2019
First Online: 19 September 2019