Yield-driven power-delay-optimal CMOS full-adder design complying with automotive product specifications of PVT variations and NBTI degradations
Crossref DOI link: https://doi.org/10.1007/s10825-016-0878-2
Published Online: 2016-08-02
Published Print: 2016-12
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Abbas, Zia
Olivieri, Mauro
Ripp, Andreas
Funding for this research was provided by:
Sapienza Università di Roma
License valid from 2016-08-02