Electrostatically doped tunnel CNTFET model for low-power VLSI circuit design
Crossref DOI link: https://doi.org/10.1007/s10825-018-1240-7
Published Online: 2018-09-05
Published Print: 2018-12
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Bala, Shashi
Khosla, Mamta
Text and Data Mining valid from 2018-09-05
Article History
First Online: 5 September 2018