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A low-leakage and high-writable SRAM cell with back-gate biasing in FinFET technology

Crossref DOI link: https://doi.org/10.1007/s10825-019-01327-1

Published Online: 2019-03-28

Published Print: 2019-06

Update policy: https://doi.org/10.1007/springer_crossmark_policy

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