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Article History

Received: 3 March 2022

Accepted: 4 June 2022

First Online: 17 June 2022

Declarations

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: The authors have no relevant financial or non-financial interests to disclose.

: The work presented in this paper is a continuation of our previous work, titled “Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits,” which was published in the <i>2020 IEEE VLSI Test Symposium</i> []. Our previous work implemented the entire MTNCL DUT as a single BIST stage, while this paper partitions the DUT, such that each MTNCL pipeline stage is its own BIST stage, in order to parallelize BIST operation. The method proposed herein not only decreases test time, but also allows for fault calculation of MTNCL circuits with data feedback, which was not possible in our previous work. Additional new contributions include development of fault exclusion rules, based upon MTNCL circuit operating principles, to better depict actual fault coverage, and hardware for increasing controllability and observability, in order to increase fault coverage. We estimate that this paper consists of approximately 50% new material compared to our VTS paper, which is well above the minimum requirement of 30% new material.