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Simulation of semiconductor wafer dicing induced faults on chips and their application as augmentation method for a deep learning based visual inspection system

Crossref DOI link: https://doi.org/10.1007/s10845-024-02559-0

Published Online: 2025-01-13

Update policy: https://doi.org/10.1007/springer_crossmark_policy

Authors

Friedrich, Michael https://orcid.org/0000-0001-6326-4749
Schlosser, Tobias https://orcid.org/0000-0002-0682-4284
Kowerko, Danny https://orcid.org/0000-0002-4538-7814
Funding

Funding for this research was provided by:

Europäischer Sozialfonds (100670286)
License Information

Text and Data Mining valid from 2025-01-13

Version of Record valid from 2025-01-13
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Article History

Received: 31 March 2024

Accepted: 23 December 2024

First Online: 13 January 2025

Declarations

:

: The authors declare that they have no Conflict of interest.

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