Drift region optimization by double epitaxial layer in low and medium power rated silicon power MOSFETs
Crossref DOI link: https://doi.org/10.1007/s10854-015-3271-1
Published Online: 2015-05-30
Published Print: 2015-09
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Sandeep, S.
Komaragiri, Rama
Funding for this research was provided by:
FRG, NIT Calicut
Text and Data Mining valid from 2015-05-30