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Designing hardware for a robust high-speed cryptographic key generator based on multiple chaotic systems and its FPGA implementation for real-time video encryption

Crossref DOI link: https://doi.org/10.1007/s11042-023-17972-5

Published Online: 2024-01-16

Update policy: https://doi.org/10.1007/springer_crossmark_policy

Authors

İnce, Esra

Karakaya, Barış https://orcid.org/0000-0001-7995-3901
Türk, Mustafa
Funding

Funding for this research was provided by:

Türkiye Bilimsel ve Teknolojik Araştırma Kurumu (121E003)

Fırat University
License Information

Text and Data Mining valid from 2024-01-16

Version of Record valid from 2024-01-16
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Article History

Received: 2 August 2023

Revised: 17 November 2023

Accepted: 21 December 2023

First Online: 16 January 2024

Declarations

:

: The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.

: The authors declare that they have no conflict of interest.

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