An FPGA-based design for a real-time image denoising using approximated fractional integrator
Crossref DOI link: https://doi.org/10.1007/s11045-020-00709-0
Published Online: 2020-02-19
Published Print: 2020-10
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Kumar, Sumit
Jha, Rajib Kumar
Funding for this research was provided by:
Digital India Corporation (U72900MH2001NPL133410)
Text and Data Mining valid from 2020-02-19
Version of Record valid from 2020-02-19
Article History
Received: 2 June 2019
Revised: 10 January 2020
Accepted: 12 February 2020
First Online: 19 February 2020