Cost-Effective and Variable-Channel FastICA Hardware Architecture and Implementation for EEG Signal Processing
Crossref DOI link: https://doi.org/10.1007/s11265-015-0988-2
Published Online: 2015-03-21
Published Print: 2016-01
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Van, Lan-Da
Huang, Po-Yen
Lu, Tsung-Che
Text and Data Mining valid from 2015-03-21
