A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D–Stacked Architecture
Crossref DOI link: https://doi.org/10.1007/s11265-016-1204-8
Published Online: 2016-12-03
Published Print: 2017-06
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Liu, Pei http://orcid.org/0000-0001-7769-7123
Hemani, Ahmed
Paul, Kolin
Weis, Christian
Jung, Matthias
Wehn, Norbert
Funding for this research was provided by:
Royal Institute of Technology
License valid from 2016-12-03