Loop Parallelization Techniques for FPGA Accelerator Synthesis
Crossref DOI link: https://doi.org/10.1007/s11265-017-1229-7
Published Online: 2017-02-28
Published Print: 2018-01
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Reiche, Oliver
Özkan, M. Akif
Hannig, Frank
Teich, Jürgen
Schmid, Moritz
License valid from 2017-02-28