Design and Verification of Low Latency AMBA AXI4 and ACE Protocol for On-Chip Peripheral Communication
Crossref DOI link: https://doi.org/10.1007/s11277-024-11362-2
Published Online: 2024-06-25
Published Print: 2024-06
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Sivaranjani, P. https://orcid.org/0000-0002-5178-4613
Sasikala, S.
Lavanya, A.
Keerthana, M.
Text and Data Mining valid from 2024-06-01
Version of Record valid from 2024-06-01
Article History
Accepted: 11 June 2024
First Online: 25 June 2024
Declarations
:
: The authors have no relevant financial or non-financial interests to disclose.