High-throughput parallel DWT hardware architecture implemented on an FPGA-based platform
Crossref DOI link: https://doi.org/10.1007/s11554-017-0711-6
Published Online: 2017-08-09
Published Print: 2019-12
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Ibraheem, Mohammed Shaaban
Hachicha, Khalil
Ahmed, Syed Zahid
Lambert, Laurent
Garda, Patrick
Text and Data Mining valid from 2017-08-09
Article History
Received: 3 January 2017
Accepted: 31 July 2017
First Online: 9 August 2017