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Data-path unrolling with logic folding for area-time-efficient FPGA-based FAST corner detector

Crossref DOI link: https://doi.org/10.1007/s11554-017-0725-0

Published Online: 2017-10-17

Published Print: 2019-12

Update policy: https://doi.org/10.1007/springer_crossmark_policy

Authors

Lam, Siew-Kei https://orcid.org/0000-0002-8346-2635
Lim, Teck Chuan

Wu, Meiqing

Cao, Bin

Jasani, Bhavan A.
License Information

Text and Data Mining valid from 2017-10-17
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Article History

Received: 20 April 2017

Accepted: 2 October 2017

First Online: 17 October 2017