An Analytical Threshold Voltage Model of Fully Depleted (FD) Recessed-Source/Drain (Re-S/D) SOI MOSFETs with Back-Gate Control
Crossref DOI link: https://doi.org/10.1007/s11664-016-4752-6
Published Online: 2016-06-30
Published Print: 2016-10
Update policy: https://doi.org/10.1007/springer_crossmark_policy
Saramekala, Gopi Krishna
Tiwari, Pramod Kumar
Funding for this research was provided by:
Science and Engineering Research Board (SB/FTP/ETA-415/2012)
License valid from 2016-06-30