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Effects of Dummy Thermal Vias on Interconnect Delay and Power Dissipation of Very Large Scale Integration Circuits

Crossref DOI link: https://doi.org/10.1007/s11859-018-1345-7

Published Online: 2018-11-14

Published Print: 2018-10

Update policy: https://doi.org/10.1007/springer_crossmark_policy

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